Spiking Neural Network (SNN) is very popular and effective in modelling the physical neurons compared to other models of the neural network. Besides the software implementation of the neuromorphic processors, hardware implementation of the neuromorphic processors is also very important in order to apply it in real-time domain. In this work, a hardware efficient architecture of the neuromorphic processor is proposed. The proposed architecture is efficient in terms of low usage of memory elements and other hardware resources. Virtex-6 field programmable gate array (FPGA) development board is used to validate the proposed design. Fixed data format of width 18 is used in this work and 10-bit is reserved for the fractional part. The proposed architecture is applied to detect the handwritten digits. In this work, MNIST database is used to train and validate the SNN. The proposed architecture achieves 90% accuracy when used to recognize the handwritten digit data.